Work

Selective Segment Bypass Scan Architecture for Test Time and Test Power Reduction

Year: 2009

Type: article

Source: Journal of the Institute of Electronics Engineers of Korea

Authors: Myung-Hoon Yang, Yong-Joon Kim, Jaeseok Park, Sungho Kang

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W2402217412

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