Work

Grouping-Based TSV Test Architecture for Resistive Open and Bridge Defects in 3-D-ICs

Year: 2016

Type: article

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI: 10.1109/tcad.2016.2611505

Authors: Young-woo Lee, Hyeonchan Lim, Sungho Kang

Institution: Yonsei University

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: National Research Foundation of Korea

Award: G7542987738

OpenAlex ID: W2521853102

FWCI: 1.325

Cites: 16

Cited by: 14

Related to: 10