Work

An incremental algorithm for test generation in Illinois scan architecture based designs

Year: 2003

Type: conference-paper

Source: Design, Automation, and Test in Europe

DOI: 10.1109/date.2002.998300

Authors: A.R. Pandey, J.H. Patel

Institution: University of Illinois Urbana-Champaign

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4249647124

FWCI: 2.293

Cites: 19

Cited by: 36

Related to: 10