Work

Deep Learning-Based Performance Testing for Analog Integrated Circuits

Year: 2024

Type: article

Abstract: In this brief, we propose a deep learning-based performance testing framework to minimize the number of required test modules while guaranteeing the accuracy requirement, where a test module corresponds to a combination of one circuit and one stimulus. First, we apply a deep neural network (DNN) to establish the mapping from the response of the circuit under test (CUT) in each module to all specifications to be tested. Then, the required test modules are selected by solving a 0–1 integer programming problem. Finally, the predictions from the selected test modules are combined by a DNN to form the specification estimations. The simulation results validate the proposed approach in terms of testing accuracy and cost.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI: 10.1109/tvlsi.2024.3496777

Authors: Jiawei Cao, Chongtao Guo, Houjun Wang, Zhigang Wang, Hao Li, Geoffrey Ye Li

Institutions: University of Electronic Science and Technology of China, Shenzhen University, Imperial College London

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: green

Funders: National Natural Science Foundation of China, China Postdoctoral Science Foundation, Natural Science Foundation of Sichuan Province, Fundamental Research Fund of Shandong University