Work

Efficient Built-In Self-Test Scheme for Inter-Die Interconnects of Chiplet-Based Chips

Year: 2024

Type: conference-paper

Source: Proceedings/Proceedings - International Test Conference

DOI: 10.1109/itc51657.2024.00034

Authors: Yi-Chun Huang, Pei-Yun Lin, Jin-Fu Li, Hong-Siang Fu, Yung-Ping Lee

Institutions: National Central University, Industrial Technology Research Institute

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: National Science and Technology Council

OpenAlex ID: W4404847709

FWCI: 1.931

Cites: 18

Cited by: 6

Related to: 10