Work

Delay Monitoring Under Different PVT Corners for Test and Functional Operation

Year: 2024

Type: conference-paper

Source: Proceedings/Proceedings - International Test Conference

DOI: 10.1109/itc51657.2024.00035

Authors: Hari Addepalli, Jiezhong Wu, Nilanjan Mukherjee, Irith Pomeranz, Janusz Rajski

Institution: Purdue University West Lafayette

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4404849333

FWCI: 0.621

Cites: 13

Cited by: 2

Related to: 10