Work

Design and Verification of Power Efficient Built-In Self-Test

Year: 2024

Type: conference-paper

DOI: 10.1109/csitss64042.2024.10816809

Authors: Shrinivas Anand Kamath M, Sujatha Hiremath

Institution: R.V. College of Engineering

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDGs: Industry, innovation and infrastructure, Affordable and clean energy

Open Access status: closed

OpenAlex ID: W4405975503

FWCI:

Cites: 20

Cited by:

Related to: 10