Work

Optimization and Debug of FIVR Parameters in Server SoC Power Delivery Network: A Post Silicon Approach with on-Die DFx

Year: 2024

Type: conference-paper

DOI: 10.1109/wintechcon61988.2024.10837704

Authors: Susan Vinoth, Vijayaanandh J P, Uday Bhaskar Kadali

Institutions: Intel (United States), Intel (India)

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4406354827

FWCI:

Cites: 9

Cited by:

Related to: 10