Work

Design and Simulation of Fault Detection Technique for NAND Based Memory Array

Year: 2024

Type: conference-paper

Source: Proceedings - Asian Test Symposium/Proceedings

DOI: 10.1109/ats64447.2024.10915226

Authors: Jamuna S, Madhura R, Kishore Kumar K, Murali S Bharadwaja

Institution: Dayananda Sagar College of Engineering

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4408442817

FWCI: 0.311

Cites: 8

Cited by: 1

Related to: 10