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Enhancing Memory Reliability: Integrating Error Correction Codes with Memory Built-In Self-Test for Effective Validation

Year: 2025

Type: conference-paper

Source: IEEE International Test Conference India (ITC India)

DOI: 10.1109/itcindia66078.2025.11141614

Authors: Luc Romain, Paul-Patrick Nordmann, Albert Au, Wei Zou, Harshitha Kodali, Martin Keim, Lori Schramm

Institution: Siemens (Germany)

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4413917154

FWCI: 1.856

Cites: 7

Cited by: 2

Related to: 10