Work

Test Time Reduction in Current Sense Amplifiers via Optimized Current Range Across Wafer Touchdowns and Gain Reordering on V93K SMT8

Year: 2025

Type: conference-paper

Source: IEEE International Test Conference India (ITC India)

DOI: 10.1109/itcindia66078.2025.11141587

Author: Hemanthkumar V

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4413917260

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Cites: 12

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Related to: 10