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Optimal Test Point Insertion for Enhanced Small Delay Defect Coverage

Year: 2025

Type: conference-paper

Source: IEEE International Test Conference India (ITC India)

DOI: 10.1109/itcindia66078.2025.11141638

Authors: Faraz Aatif, Prathiba Muthukrishnan, Sivanantham Sathasivam

Institution: Vellore Institute of Technology University

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4413917422

FWCI:

Cites: 8

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Related to: 10