Scalable Yield Analysis of SRAM and Analog Circuits Using Multi-Kernel Sparse Representation
Year: 2025
Type: article
DOI: 10.1145/3767165
Authors: Ziqi Wang, Liangji Wu, Xiaoyong Li, Zhongxi Guo, Xiao Shi, Longxing Shi
Institutions: Southeast University, Southeast University
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
Awards: G1448638579, G903443910
OpenAlex ID: W4414594412
