Work

Hardware Design Margin Model for IC Test and Case Analysis

Year: 2025

Type: conference-paper

Source: International Conference on Computer Information Science and Application Technology (CISAT)

DOI: 10.1109/cisat66811.2025.11181769

Authors: Puhong Lei, Jiwei Li, Xiao Hu

Institution: National University of Defense Technology

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4414692966

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Cites: 9

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