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Mahmoud Zangeneh
Observed name:
Zangeneh, Mahmoud
Institution:
Boston University
Observed institutions:
Boston University,
University of Tehran
OpenAlex ID:
A5003673883
Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM
2013
·
Mahmoud Zangeneh
, Ajay Joshi
·
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
·
125
Detecting hardware trojans using backside optical imaging of embedded watermarks
2015
·
Boyou Zhou
, Ronen Adato
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
46
Performance and energy models for memristor-based 1T1R RRAM cell
2012
·
Mahmoud Zangeneh
, Ajay Joshi
·
ACM Great Lakes Symposium on VLSI (GLSVLSI)
·
22
Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging
2016
·
Adato, Ronen
, Uyar, Aydan
, et al.
·
arXiv (Cornell University)
·
10
PDF
Designing Tunable Subthreshold Logic Circuits Using Adaptive Feedback Equalization
2015
·
Mahmoud Zangeneh
, Ajay Joshi
·
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
·
10
An analytical delay reduction strategy for buffer-inserted global interconnects in VDSM technologies
2009
·
Mahmoud Zangeneh
, Nasser Masoumi
·
European Conference on Circuit Theory and Design
·
8
Throughput optimization for interleaved repeater-inserted interconnects in VLSI design
2010
·
Mahmoud Zangeneh
, Nasser Masoumi
·
IEEE International Nanoelectronics Conference
·
7
Sub-threshold logic circuit design using feedback equalization
2014
·
Mahmoud Zangeneh
, Ajay Joshi
·
Design, Automation, and Test in Europe
·
5
A compact current-voltage model for carbon nanotube field effect transistors
2008
·
Hadi Hosseinzadegan
, Hossein Aghababa
, et al.
·
CAS proceedings
·
5
Sub-threshold logic circuit design using feedback equalization
2014
·
Mahmoud Zangeneh
, Ajay Joshi
·
Design, Automation, and Test in Europe
·
4
Dictionary-based sparse representation for resolution improvement in laser voltage imaging of CMOS integrated circuits
2015
·
T. Berkin Cilingiroglu
, Mahmoud Zangeneh
, et al.
·
Design, Automation, and Test in Europe
·
3
Designing energy-efficient sub-threshold logic circuits using equalization and non-volatile memory circuits using memristors
2015
·
Mahmoud Zangeneh
·
OpenBU (Boston University)
·
2
Integrated Nanoantenna Labels for Rapid Security Testing of Semiconductor Circuits
2015
·
Ronen Adato
, Aydan Uyar
, et al.
·
Frontiers in Optics
·
1
Dictionary-Based Sparse Representation for Resolution Improvement in Laser Voltage Imaging of CMOS Integrated Circuits
2015
·
T. Berkin Cilingiroglu
, Mahmoud Zangeneh
, et al.
·
Design, Automation, and Test in Europe
·
1
MIRIM: Modified Interleaved Repeater Insertion Methodology to Reduce Delay Uncertainty in Global Interconnections
2013
·
Nasser Masoumi
, Mahmoud Zangeneh
Effects of Device and Peripheral Parameters on Transconductance of Silicon Nanowire Transistors
2011
·
Mahmoud Zangeneh
, Hossein Aghababa
, et al.
·
Journal of Nanoscience and Nanotechnology
Statistical delay modeling of read operation of SRAMs due to channel length variation
2010
·
Hossein Aghababa
, Mahmoud Zangeneh
, et al.
·
IEEE International Symposium on Circuits and Systems proceedings
Effects of device and peripheral parameters on transconductance of silicon nanowire transistors
2010
·
Mahmoud Zangeneh
, Hossein Aghababa
, et al.
·
IEEE International Nanoelectronics Conference
Design of a two-capacitor sample & hold circuit using a two-stage OTA with hybrid cascode compensation
2009
·
Mahmoud Zangeneh
, Hossein Aghababa
, et al.
·
European Conference on Circuit Theory and Design
Analysis of potential function in cylindrical nanowires
2008
·
Mahmoud Zangeneh
, Hossein Aghababa
, et al.
·
CAS proceedings
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Works count:
20
Citation count:
249
H-index:
7
I10-index:
5
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