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Author

Chorng-Jung Lin

Observed institution: National Tsing Hua University
OpenAlex ID: A5023656341
A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors
2018 · Wei-Hao Chen, Kai-Xiang Li, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 335
24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors
2019 · Cheng-Xin Xue, Wei-Hao Chen, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 291
CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors
2019 · Wei-Hao Chen, Chunmeng Dou, et al. · Nature Electronics · 269
19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme
2014 · Meng-Fan Chang, Jui-Jen Wu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 149
An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory
2013 · Meng-Fan Chang, Shin-Jang Shen, et al. · IEEE Journal of Solid-State Circuits · 98
A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time
2012 · Meng-Fan Chang, Che-Wei Wu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 85
A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro
2013 · Meng-Fan Chang, Che-Wei Wu, et al. · IEEE Journal of Solid-State Circuits · 32
An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory
2011 · Meng-Fan Chang, Shin-Jang Shen, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 30
Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme
2014 · Meng-Fan Chang, Chia-Chen Kuo, et al. · IEEE Journal of Solid-State Circuits · 26
Works count: 9
Citation count: 1,315
H-index: 9
I10-index: 9
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