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Daniel Séverac

Reducing power consumption during test application by test vector ordering
2002 · P. Girard, C. Landrault, et al. · IEEE International Symposium on Circuits and Systems proceedings · 116
A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks
2010 · Erwan Le Roux, Nicola Scolari, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 38
Reduction of power consumption during test applicationby test vector ordering
1997 · P. Girard, C. Landrault, et al. · Electronics Letters · 26
On-Body Propagation Performance With Textile Antennas at 867 MHz
2013 · Mervi Hirvonen, Christian Bohme, et al. · IEEE Transactions on Antennas and Propagation · 25
A gate resizing technique for high reduction in power consumption
1997 · P. Girard, C. Landrault, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 23
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11.5 A 3.2×1.5×0.8mm3 240nA 1.25-to-5.5V 32kHz-DTCXO RTC module with an overall accuracy of µ1ppm and an all-digital 0.1ppm compensation-resolution scheme at 1Hz
2016 · David Ruffieux, Franz Pengg, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 16
Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation
2013 · Marc Pons, Jean-Luc Nagel, et al. · International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) · 12
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation
2016 · Marc Pons, Thanh-Chau Le, et al. · European Solid-State Circuits Conference (ESSCIRC) · 9
Technique for reducing power consumption in CMOScircuits
1997 · P. Girard, C. Landrault, et al. · Electronics Letters · 6
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation
2016 · Marc Pons, Thanh-Chau Le, et al. · European Solid-State Device Research Conference · 5
PVT compensation in Mie Fujitsu 55 nm DDC: A standard-cell library based comparison
2017 · Thomas Christoph Muller, Jean-Luc Nagel, et al. · IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference · 4
Cost-effective and miniaturized System-on-Chip based solutions for portable medical & BAN applications
2011 · Dragan Manic, Daniel Severac, et al. · International Symposium on Medical Information and Communication Technology · 4
A non-iterative gate resizing algorithm for high reduction in power consumption
1997 · P. Girard, C. Landrault, et al. · Integration · 4
System-on-chip solutions for portable medical devices.
2008 · D Manic, D Severac, et al. · PubMed · 2
A 1kb single-side read 6T sub-threshold SRAM in 180 nm with 530 Hz frequency 3.1 nA total current and 2.4 nA leakage at 0.27 V
2015 · Marc Pons, Thanh-Chau Le, et al. · IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference · 1
Low-Power Heterogeneous Systems-on-Chips
2008 · Christian Piguet, Jean-Luc Nagel, et al. · Journal of Low Power Electronics · 1
A 32 kHz DTCXO RTC Module with an Overall Accuracy of ±1 ppm and an All-Digital 0.1 ppm Compensation-Resolution Scheme
2017 · David Ruffieux, Nicola Scolari, et al. · Springer eBooks
1Hzにおける0.1ppmオールディジタル補償-分解能方式による±1ppmの総合精度の3.2×1.5×0.8mm3 240nA 1,25~5.5V 32kHz DTCXO RTCモジュール
2016 · Ruffieux David, Pengg Franz, et al.
A 10 kgates sub-threshold stream cipher in 180 nm with 6.1 kHz frequency 70 nA total current and 46 nA leakage at 0.33 V
2015 · Marc Pons, Thanh-Chau Le, et al. · IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference
Sub-Threshold Design and Architectural Choices
2015 · Christian Piguet, Marc Pons, et al. · IEEE Computer Society Annual Symposium on VLSI
Trends in Design Methods for Complex Heterogeneous Systems
2011 · C. Piguet, J.-L. Nagel, et al. · Springer eBooks
Contribution à l'optimisation en puissance des circuits CMOS et application au test fonctionnel
1998 · Daniel Séverac
Works count: 22
Citation count: 292
H-index: 8
I10-index: 7
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