Work

A non-iterative gate resizing algorithm for high reduction in power consumption

Year: 1997

Type: article

Source: Integration

DOI: 10.1016/s0167-9260(97)00024-2

Authors: P. Girard, C. Landrault, S. Pravossoudovitch, D. Severac

Institutions: Centre National de la Recherche Scientifique, Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W1963805087

FWCI:

Cites: 23

Cited by: 4

Related to: 10