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Yoshisato Yokoyama

On-Chip Variable Inductor Using Microelectromechanical Systems Technology
2003 · Yoshisato Yokoyama, Takashi Fukushige, et al. · Japanese Journal of Applied Physics · 40
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Fabrication and evaluation of an on-chip micro-variable inductor
2003 · T. Fukushige, Y. Yokoyama, et al. · Microelectronic Engineering · 26
Variable RF Inductor on Si CMOS Chip
2004 · Hirotaka Sugawara, Yoshisato Yokoyama, et al. · Japanese Journal of Applied Physics · 24
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A 29.2 Mb/mm2 Ultra High Density SRAM Macro using 7nm FinFET Technology with Dual-Edge Driven Wordline/Bitline and Write/Read-Assist Circuit
2020 · Yoshisato Yokoyama, Miki Tanaka, et al. · IEEE Symposium on VLSI Circuits (VLSI-Circuits) · 18
2RW dual-port SRAM design challenges in advanced technology nodes
2015 · Koji Nii, Makoto Yabuuchi, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 15
Equivalent Circuit Analysis of RF-Integrated Inductors with/without Ferromagnetic Material
2003 · Masahiro Yamaguchi, Yoshisato Yokoyama, et al. · Japanese Journal of Applied Physics · 14
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Disturbance Aware Dynamic Power Reduction in Synchronous 2RW Dual-Port 8T SRAM by Self-Adjusting Wordline Pulse Timing
2022 · Yoshisato Yokoyama, Koji Nii, et al. · IEEE Journal of Solid-State Circuits · 13
40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of −40 to 170°C with test screening against write disturb issues
2014 · Yoshisato Yokoyama, Yuichiro Ishii, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 11
40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU
2014 · Yoshisato Yokoyama, Yuichiro Ishii, et al. · 8
Variable RF Inductor on Si CMOS Chip
2003 · Shinichiro Gomi, Yoshisato Yokoyama, et al. · International Conference on Solid State Devices and Materials (SSDM) · 7
15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture
2024 · Masaru Haraguchi, Yorinobu Fujino, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 5
A dynamic power reduction in synchronous 2RW 8T dual-port SRAM by adjusting wordline pulse timing with same/different row access mode
2017 · Yoshisato Yokoyama, Yuichiro Ishii, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 5
Cost-Effective Test Screening Method on 40-nm Embedded SRAMs for Low-Power MCUs
2021 · Yoshisato Yokoyama, Yuichiro Ishii, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 4
A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCU
2015 · Yoshisato Yokoyama, Yuichiro Ishii, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 4
40-nm 64-kbit Buffer/Backup SRAM with 330 nW Standby Power at 65°C Using 3.3 V IO MOSs for PMIC less MCU in IoT Applications
2018 · Yoshisato Yokoyama, Tomohiro Miura, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 3
On-Chip Variable Inductor Using MEMS Technology
2002 · Yoshisato Yokoyama, Takashi Fukushige, et al. · International Conference on Solid State Devices and Materials (SSDM) · 3
A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm 2 Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture
2024 · Masaru Haraguchi, Yorinobu Fujino, et al. · IEEE Journal of Solid-State Circuits · 2
A Cost Effective Test Screening Circuit for embedded SRAM with Resume Standby on 110-nm SoC/MCU
2019 · Yoshisato Yokoyama, Kenji Goto, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 1
Fabrication Of Wrapped Micro Coils Wound Around A Magnetic Core
2005 · N. Yamada, Y. Yokoyama, et al. · Proceedings of the International Solid-State Sensors and Actuators Conference - TRANSDUCERS '95 · 1
A Dynamic Power Reduction in Synchronous 2RW 8T Dual-Port SRAM by Adjusting Wordline Pulse Timing with Same/Different Row Access Mode
2018 · Yoshisato Yokoyama, Yuichiro Ishii, et al. · IEICE Technical Report; IEICE Tech. Rep.
A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-power MCU
2016 · Yuta Yoshida, Yoshisato Yokoyama, et al. · IEICE Technical Report; IEICE Tech. Rep.
40 nm Dual-port and Two-port SRAMs for Automotive MCU Applications under the Wide Temperature Range of -40 to 170℃ with Test Screening Against Write Disturb Issues
2015 · Yoshisato Yokoyama, Ishii Yuichiro, et al. · IEICE Technical Report; IEICE Tech. Rep.
Equivalent circuit analysis of RF integrated inductors with/without ferromagnetic material
2002 · Masahiro Yamaguchi, Yoshisato Yokoyama, et al. · International Conference on Solid State Devices and Materials (SSDM)
GHz Clock Distribution Using Transmission Line Interconnect and CMOS Differential Driver Circuit in Si ULSI
2001 · Yoshisato Yokoyama, Tomohito Tsushima, et al. · International Conference on Solid State Devices and Materials (SSDM)
Interconnect Length Distribution in Si System ULSI
2001 · Naohiro Takagi, Hiyouko Shinoki, et al. · International Conference on Solid State Devices and Materials (SSDM)
Works count: 26
Citation count: 204
H-index: 8
I10-index: 8
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