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Metha Jeeradit
Observed name:
M. Jeeradit
Institution:
Stanford University
Observed institutions:
Cornell University,
Rambus (United States),
Stanford University
OpenAlex ID:
A5064869477
A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR
2007
·
Brian S. Leibowitz
, Jade Kizer
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
54
A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter for Backplane Communications
2008
·
Jafar Savoj
, Aliazam Abbasfar
, et al.
·
IEEE Journal of Solid-State Circuits
·
45
Compressing Extended Program Traces Using Value Predictors
·
Martin Burtscher
, Metha Jeeradit
·
37
A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter
2008
·
Amir Amirkhany
, Aliazam Abbasfar
, et al.
·
IEEE Journal of Solid-State Circuits
·
34
Characterizing sampling aperture of clocked comparators
2008
·
M. Jeeradit
, J. Kim
, et al.
·
Symposium on VLSI Circuits
·
33
Fortifying analog models with equivalence checking and coverage analysis
2010
·
Mark Horowitz
, Metha Jeeradit
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
28
Impulse sensitivity function analysis of periodic circuits
2008
·
Jaeha Kim
, Brian S. Leibowitz
, et al.
·
20
A 24Gb/s Software Programmable Multi-Channel Transmitter
2007
·
A. Amirkhany
, A. Abbasfar
, et al.
·
Symposium on VLSI Circuits
·
20
Leveraging designer's intent: A path toward simpler analog CAD tools
2009
·
Jaeha Kim
, Metha Jeeradit
, et al.
·
Custom Integrated Circuits Conference
·
19
Compressing extended program traces using value predictors
2004
·
M. Burtscher
, Metha Jeeradit
·
MTS/IEEE OCEANS Conference (OCEANS)
·
16
A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter
2007
·
Jafar Savoj
, Aliazam Abbasfar
, et al.
·
Symposium on VLSI Circuits
·
10
Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system
2006
·
C. Werner
, C. Hoyer
, et al.
·
Custom Integrated Circuits Conference
·
7
Intent-leveraged optimization of analog circuits via homotopy
2010
·
Metha Jeeradit
, Jaeha Kim
, et al.
·
Design, Automation, and Test in Europe
Nano-magnetic non-volatile CMOS circuits for nano-scale FPGAs (abstract only)
2010
·
Larkhoon Leem
, James A. Weaver
, et al.
·
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
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Works count:
18
Citation count:
323
H-index:
10
I10-index:
11
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