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O. Bon

First 15V complementary LDMOS transistors in thin SOI 65nm low power technology
2007 · O. Bon, O. Gonnard, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 15
High voltage devices added to A 0.13μm high resistivity thin SOI CMOS process for mixed analog-RF circuits
2006 · O. Bon, L. Boissonnet, et al. · IEEE International SOI Conference (SOI) · 11
High resistivity SOI CMOS technology for multi-standard RF frontends
2008 · F. Gianesello, D. Gloria, et al. · IEEE International SOI Conference (SOI) · 10
RF Power NLDMOS Technology Transfer Strategy from the 130nm to the 65nm node on thin SOI
2007 · O. Bon, O. Gonnard, et al. · IEEE International SOI Conference (SOI) · 9
High current 3D symmetrical inductor integrated in an advanced HR SOI CMOS technology targeting RF power applications
2009 · F. Gianesello, D. Gloria, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 6
Thermal effects modeling of multi-fingered MOSFETs based on new specific test structures
2009 · S. Hniki, G. Bertrand, et al. · European Solid-State Device Research Conference · 3
Improvement of the RF power performance of nLDMOSFETs on bulk and SOI substrates with ‘ribbon’ gate and source contacts layouts
2009 · D. Fournier, D. Ducatteau, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 3
Small-Size low losses WLAN and GSM/DCS diplexers integrated in a low cost 130 nm high resistivity SOI CMOS technology
2009 · F. Gianesello, A. Giry, et al. · European Microwave Conference (EuMC) · 2
New self heating structures for thermal coupling modeling on multi-fingered SOI power devices
2009 · S. Hniki, G. Bertrand, et al. · IEEE International Symposium on Power Semiconductor Devices and ICs/Proceedings of the International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices & ICs/Proceedings of the ... International Symposium on Power Semiconductor Devices and ICs · 2
Small-size low losses GSM and DCS harmonic filters integrated in a low cost 130 nm high resistivity SOI CMOS technology
2010 · F. Gianesello, C. Durand, et al. · IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)
Conception de transistors haute tension complémentaires en technologie 65nm sur substrat silicium sur isolant fin pour applications RF et conversion de puissance
2008 · Bon, Olivier · Thèses en ligne de l'Université Toulouse III (Université Toulouse III)
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Thermal resistance reduction in power MOSFETs integrated in a 65nm SOI technology
2007 · O. Bon, J. Roig, et al. · European Solid-State Device Research Conference
Works count: 12
Citation count: 61
H-index: 5
I10-index: 3
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