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Nansen Chen

Electrical characterization and structure investigation of quad flat non-lead package for RFIC applications
2002 · Nansen Chen, Kevin Chiang, et al. · Solid-State Electronics · 28
Electrical characterization of quad flat non-lead package for RFIC applications
2002 · Nansen Chen, K. Chiang, et al. · International Semiconductor Device Research Symposium · 6
Designs of power distribution network for octa-core mobile application processor
2015 · Nansen Chen · IEEE Workshop on Signal and Power Integrity · 5
A two-layer board intellectual property to reduce electromagnetic radiation
2010 · Nansen Chen, Hongchin Lin · IEEE International Symposium on Electromagnetic Compatibility · 2
Controlled S-Parameters on Multi-Layer Package
2003 · Nansen Chen, Kevin Chiang, et al. · ASME International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems (InterPACK) · 2
2-Gb/s/pin DDR3 memory channel design and simulation for carbon reduction
2014 · Nansen Chen · International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE) · 1
Design of die-pad on exposed substrate (DOES) leadframe package for DDR3 interface applications
2012 · Nansen Chen · International Conference on Electronic Packaging Technology (ICEPT) · 1
Evaluation of multi-Gbps serial link using wire-bonded multiple exposed pads (M-pad) leadframe package
2008 · Nansen Chen, Hongchin Lin · Microsystem Technologies · 1
Investigation of low cost consumer electronic system using 1066-Mb/s DDR2 interface design
2008 · Nansen Chen, Hongchin Lin · IEEE International Conference on Solid-State and Integrated Circuit Technology · 1
Electrical Design and Manufacturing Evaluation for Multiple Exposed Pads (M-pad) Leadframe Package
2007 · Nansen Chen, Hongchin Lin · International Symposium on High Density packaging and Microsystem Integration · 1
From SI, PI, EMI Design, Verification, to Package, Board, and Channel Intellectual Property
2022 · Nansen Chen · IEEE Electronics Packaging Technology Conference (EPTC)
Power Channel Design and Verification for Automotive Chipset with Multi-Core Processor
2019 · Nansen Chen · IEEE CPMT Symposium Japan (ICSJ)
From Low-Cost High-Speed Channel Design, Simulation, to Rapid Time-to-Market
2018 · Nansen Chen, Mizar Chang · Linköping electronic conference proceedings
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Simplified impedance design and control for low-cost high-speed channels
2017 · Nansen Chen · International Conference on Consumer Electronics and Devices (ICCED)
Design of Costless and Adjustable Inductors Embedded in Array Packages
2007 · Nansen Chen, Hongchin Lin · International Symposium on Signals, Systems and Electronics
Modeling of nonideal return paths on multilayer package
2003 · Nansen Chen · IEEE Electronic Components and Technology Conference (ECTC)
Works count: 17
Citation count: 48
H-index: 3
I10-index: 1
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