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Akihito Jingu
Institution:
Renesas Electronics (Japan)
Observed institution:
Renesas Electronics (Japan)
OpenAlex ID:
A5082714151
Realization of “skeleton wafer” testing for electrical failure analysis
2018
·
Hiroshi Yanagita
, Akihito Jingu
, et al.
·
IEEE International Symposium on Semiconductor Manufacturing conference proceedings
·
2
Cost-Effective and Time-Efficient Failure Analysis Method for Yield Enhancement Utilizing Picked Sawn Wafer
2019
·
Hiroshi Yanagita
, Akihito Jingu
, et al.
·
IEEE Transactions on Semiconductor Manufacturing
·
1
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Works count:
2
Citation count:
3
H-index:
1
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