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Mitsutoshi Higashi

Silicon interposer with TSVs (Through Silicon Vias) and fine multilayer wiring
2008 · Masahiro Sunohara, Takayuki Tokunaga, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 158
A Silicon interposer BGA package with Cu-filled TSV and multi-layer Cu-plating interconnect
2008 · Kouichi Kumagai, Yuko Yoneda, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 87
Studies on electrical performance and thermal stress of a silicon interposer with TSVs
2010 · Masahiro Sunohara, Hideaki Sakaguchi, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 55
Warpage control of silicon interposer for 2.5D package application
2013 · Kei Murayama, Mitsuhiro Aizawa, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 45
Development of silicon module with TSVs and global wiring (L/S=0.8/0.8µm)
2009 · Masahiro Sunohara, Akinori Shiraishi, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 28
Development of Si interposer with low inductance decoupling capacitor
2011 · Akihito Takano, Masahiro Sunohara, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 21
Evaluation of Mechanical Stress Induced During IC Packaging
2018 · Vladimir Cherman, Melina Lofrano, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 18
High density 3D silicon interposer technology development and electrical characterization for high end applications
2012 · Jean Charbonnier, Myriam Assous, et al. · Electronic System-Integration Technology Conference (ESTC) · 15
Electro-migration behavior in low temperature flip chip bonding
2012 · Kei Murayama, Mitsutoshi Higashi, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 14
Electro-migration Behavior in Eutectic Sn-Bi Flip Chip Solder Joints with Cu-Pillar Electrodes
2013 · Kei MURAYAMA, Takashi KURIHARA, et al. · Journal of Smart Processing · 12
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Electro-migration Behavior in Micro-joints of Sn-57Bi solder and Cu Post Bumps
2011 · Kei Murayama, Taiji Sakai, et al. · IMAPSource Proceedings · 12
Study of electro-migration resistivity of micro bump using SnBi solder
2014 · Kei Murayama, Mitsuhiro Aizawa, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 11
Full Integration and Electrical Characterization of 3D Silicon Interposer Demonstrator Incorporating High Density TSVs and Interconnects
2012 · Ken Miyairi, Masahiro Sunohara, et al. · IMAPSource Proceedings · 7
Cost and performance effective silicon interposer and Vertical Interconnect for 3D ASIC and memory integration
2014 · Li Li, Mitsutoshi Higashi, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 4
Warpage behavior in 2.5D package using Si-interposer
2013 · Koji Hara, Kei Murayama, et al. · IEEE CPMT Symposium Japan (ICSJ) · 4
TLP Bonding Technologies for Micro Joining and 3D Packaging
2010 · Kei Murayama, Mitsuhiro Aizawa, et al. · Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) · 4
Electrical and morphological characterization for high integrated silicon interposer and technology transfer from 200 mm to 300mm wafer
2013 · Masahiro Sunohara, Ken Miyairi, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 2
Wafer Level Package for MEMS with TSVs and Hermetic Seal
2011 · Akinori Shiraishi, Mitsutoshi Higashi, et al. · Additional Conferences (Device Packaging HiTEC HiTEN & CICMT)
Works count: 18
Citation count: 497
H-index: 11
I10-index: 12
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