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Rishikesh Krishnan
Observed name:
R. Krishnan
Institution:
IBM Research - Albany
Observed institutions:
Pennsylvania State University,
IBM (United States),
Cornell University,
GlobalFoundries (United States),
GlobalFoundries (Singapore),
IBM Research - Albany,
University of Rochester
show all 7
OpenAlex ID:
A5111941266
Optical Properties of Colloidal PbSe Nanocrystals
2002
·
Hui Du
, Chialing Chen
, et al.
·
Nano Letters
·
471
On Enhanced Miller Capacitance Effect in Interband Tunnel Transistors
2009
·
S. Mookerjea
, R. Krishnan
, et al.
·
IEEE Electron Device Letters
·
224
Experimental demonstration of 100nm channel length In0.53Ga0.47As-based vertical inter-band tunnel field effect transistors (TFETs) for ultra low-power logic and SRAM applications
2009
·
S. Mookerjea
, D. Mohata
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
126
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
2012
·
S. Narasimha
, P. Chang
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
95
Toward Increasing FPGA Lifetime
2008
·
S. Srinivasan
, R. Krishnan
, et al.
·
IEEE Transactions on Dependable and Secure Computing
·
83
Impact of aggressive fin width scaling on FinFET device characteristics
2017
·
X. He
, J. Fronheiser
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
64
A 7nm CMOS technology platform for mobile and high performance compute application
2017
·
S. Narasimha
, B. Jagannathan
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
62
Polarization Surface-Charge Density of Single Semiconductor Quantum Rods
2004
·
Rishikesh Krishnan
, Megan A. Hahn
, et al.
·
Physical Review Letters
·
58
Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits
2008
·
R. Ramanarayanan
, V.S. Degalahal
, et al.
·
IEEE Transactions on Dependable and Secure Computing
·
50
Scaling deep trench based eDRAM on SOI to 32nm and Beyond
2009
·
G. Wang
, D. Anand
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
48
22-nm FD-SOI Embedded MRAM Technology for Low-Power Automotive-Grade-l MCU Applications
2018
·
K. Lee
, R. Chao
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
46
22-nm FD-SOI Embedded MRAM with Full Solder Reflow Compatibility and Enhanced Magnetic Immunity
2018
·
K. Lee
, K. Yamane
, et al.
·
Symposium on VLSI Technology
·
37
Effect of oxidation on charge localization and transport in a single layer of silicon nanocrystals
2004
·
R. Krishnan
, Q. Xie
, et al.
·
Journal of Applied Physics
·
27
PDF
Characterization and optimization of charge trapping in high-k dielectrics
2013
·
E. Cartier
, T. Ando
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
14
A 0.039um2 high performance eDRAM cell based on 32nm High-K/Metal SOI technology
2010
·
N. Butt
, K. Mcstay
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
14
High Performance and Yield for Super Steep Retrograde Wells (SSRW) by Well Implant / Si-based Epitaxy on Advanced Technology FinFETs
2019
·
U. Rana
, D. P. Brunco
, et al.
·
Conference digest
·
13
Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond
2012
·
Balaji Jayaraman
, Sneha Gupta
, et al.
·
IEEE International Conference on IC Design and Technology (ICICDT)
·
13
Controlled Nucleation of Silicon Nanocrystals on a Periodic Template
2001
·
Christopher C. Striemer
, Rishikesh Krishnan
, et al.
·
Nano Letters
·
13
Using colloidal gold nanoparticles for studies of laser interaction with defects in thin films
2001
·
Semyon Papernov
, Ansgar W. Schmid
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
11
Modeling and Characterization of Gate Leakage in High-K Metal Gate Technology-Based Embedded DRAM
2013
·
Mohit Bajaj
, Rajan K. Pandey
, et al.
·
IEEE Transactions on Electron Devices
·
9
The development of nanocrystalline silicon for emerging microelectronic and nanoelectronic applications
2004
·
Christopher C. Striemer
, Rishikesh Krishnan
, et al.
·
JOM
·
7
A novel atomic layer oxidation technique for EOT scaling in gate-last high-к/metal gate CMOS technology
2011
·
Min Dai
, Jinping Liu
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
6
UV Assisted Densification of Perhydropolysilazane (PHPS) Based Spin-On Glass in High Aspect Ratio Gap Fill Structure
2018
·
Sanjay Mehta
, Haifeng Sheng
, et al.
·
ECS Transactions
·
5
PDF
Hot Carrier Degradation and performance boost on Si Channel nFET Gate-All-Around Nanosheet Devices
2025
·
H. Zhou
, M. Hasanuzzaman
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
3
Silicon nanocrystals: Structural, electrical and optical properties
2005
·
R. Krishnan
·
PhDT
·
2
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Works count:
38
Citation count:
1,505
H-index:
14
I10-index:
19
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