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D.W. Knapp
Observed names:
D. Knapp,
D. W. Knapp
Institution:
University of Illinois Urbana-Champaign
Observed institutions:
University of Southern California,
University of Illinois Urbana-Champaign,
University of Illinois System,
Synopsys (United States)
OpenAlex ID:
A5114008661
Behavioral synthesis methodology for HDL-based specification and validation
1995
·
D. Knapp
, T. Ly
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
60
PDF
Fasolt: a program for feedback-driven data-path optimization
1992
·
D.W. Knapp
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
38
The ADAM design planning engine
1991
·
D.W. Knapp
, A.C. Parker
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
34
A Design Utility Manager: the ADAM Planning Engine
1986
·
D.W. Knapp
, A.C. Parker
·
ACM/IEEE Design Automation Conference (DAC)
·
30
Manual rescheduling and incremental repair of register-level datapaths
2003
·
D.W. Knapp
·
International Conference on Computer Aided Design
·
20
A Data Structure for VLSI Synthesis and Verification
1983
·
D.W. Knapp
, Alice C. Parker
·
STIN
·
19
Feedback-driven datapath optimization in Fasolt
2002
·
D.W. Knapp
·
International Conference on Computer Aided Design
·
17
An interactive tool for register-level structure optimization
1989
·
D. W. Knapp
·
ACM/IEEE Design Automation Conference (DAC)
·
17
A prescriptive formal model for data-path hardware
1992
·
D.W. Knapp
, M. Winslett
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
14
Datapath optimization using feedback
2002
·
D.W. Knapp
·
European Design Automation Conference
·
12
Encoding multiple outputs for improved column compaction
2002
·
D. Binger
, D.W. Knapp
·
International Conference on Computer Aided Design
·
8
A Review of Hardware Synthesis Techniques
1996
·
R. Camposano
, D. Knapp
, et al.
·
Springer eBooks
·
6
Use of change coordination in an information-rich design environment
1989
·
M. Winslett
, D. Knapp
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
5
Modeling and Simulation of the SDC Data Collection Chip
2005
·
E. Hughes
, G. Tharakan
, et al.
·
IEEE NPSS Real Time Conference on Computer Applications in Nuclear, Particle and Plasma Physics (RT)
·
3
Modeling and simulation of the SDC data collection chip
1992
·
E. Hughes
, G. Tharakan
, et al.
·
IEEE Transactions on Nuclear Science
·
3
Automatic synthesis of a dual-PLA controller with a counter
2002
·
D. Binger
, D.W. Knapp
·
IEEE/ACM International Symposium on Microarchitecture (MICRO)
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Works count:
16
Citation count:
286
H-index:
10
I10-index:
10
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