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H. Sunamura

Observed name: H Sunamura
OpenAlex ID: A5114058036
Nanometer-scale switches using copper sulfide
2003 · T. Sakamoto, H. Sunamura, et al. · Applied Physics Letters · 514
A nonvolatile programmable solid-electrolyte nanometer switch
2005 · S. Kaeriyama, T. Sakamoto, et al. · IEEE Journal of Solid-State Circuits · 222
Ultra-thin-body and BOX (UTBB) fully depleted (FD) device integration for 22nm node and beyond
2010 · Q. Liu, A. Yagishita, et al. · Symposium on VLSI Technology · 91
Low-power embedded ReRAM technology for IoT applications
2015 · M. Ueki, K. Takeuchi, et al. · Symposium on VLSI Technology · 70
A 0.063 µm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
2010 · V. S. Basker, T. Standaert, et al. · Symposium on VLSI Technology · 66
Highly reliable BEOL-transistor with oxygen-controlled InGaZnO and Gate/Drain offset design for high/low voltage bridging I/O operations
2011 · K. Kaneko, N. Inoue, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 40
Low-power embedded ReRAM technology for IoT applications
2015 · M. Ueki, K. T. Akeuchi, et al. · Symposium on VLSI Circuits · 35
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
2011 · Takashi Yamashita, V. Basker, et al. · Symposium on VLSI Technology · 34
Material dependence of switching speed of atomic switches made from silver sulfide and from copper sulfide
2007 · T Tamura, T Hasegawa, et al. · Journal of Physics Conference Series · 26
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A nonvolatile programmable solid electrolyte nanometer switch
2004 · T. Sakamoto, S. Kaeriyama, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 22
Operation of functional circuit elements using BEOL-transistor with InGaZnO channel for on-chip high/low voltage bridging I/Os and high-current switches
2012 · K. Kaneko, H. Sunamura, et al. · Symposium on VLSI Technology · 18
High-voltage complementary BEOL-FETs on Cu interconnects using N-type IGZO and P-type SnO dual oxide semiconductor channels
2013 · H. Sunamura, K. Kaneko, et al. · Symposium on VLSI Technology · 15
Single-electron memory using carrier traps in a silicon nitride layer
1999 · H. Sunamura, T. Sakamoto, et al. · Applied Physics Letters · 14
High on/off-ratio P-type oxide-based transistors integrated onto Cu-interconnects for on-chip high/low voltage-bridging BEOL-CMOS I/Os
2012 · H. Sunamura, K. Kaneko, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 10
Enhanced drivability of high-Vbd dual-oxide-based complementary BEOL-FETs for compact on-chip pre-driver applications
2014 · H. Sunamura, N. Inoue, et al. · Symposium on VLSI Technology · 6
Ultra-uniform threshold voltage in SONOS-type non-volatile memory with novel charge trap layer formed by plasma nitridation
2006 · H. Sunamura, K. Masuzaki, et al. · IEEE International Memory Workshop (IMW) · 3
BEOL-Transistor Technology with InGaZnO channel for High/Low Voltage Bridging I/Os
2015 · K. Kaneko, N. Inoue, et al. · International Conference on Solid State Devices and Materials (SSDM)
Multiple-valued memory operation in SiN-based single-electron memory
2002 · H. Sunamura, H. Kawaura, et al. · Conference digest
Works count: 18
Citation count: 1,186
H-index: 13
I10-index: 14
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