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Keyword

scan chain

Description: A serial arrangement of circuit elements in an integrated circuit that enables internal states to be shifted for testing and debugging.
Wikidata ID: wiki/Q225990
OpenAlex ID: keywords/scan-chain
Survey of Test Vector Compression Techniques
2006 · N.A. Touba · IEEE Design & Test of Computers · 439
Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard
2005 · Bo Yang, Kaijie Wu, et al. · 348
An efficient test vector compression scheme using selective huffman coding
2003 · A. Jas, J. Ghosh-Dastidar, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 277
Leakage current reduction in CMOS VLSI circuits by input vector control
2004 · A. Abdollahi, F. Fallah, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 270
Adapting scan architectures for low power operation
2002 · L. Whetsel · Proceedings/Proceedings - International Test Conference · 266
Scan vector compression/decompression using statistical coding
2003 · A. Jas, J. Ghosh-Dastidar, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 264
Wrapper design for embedded core test
2002 · E.J. Marinissen, S.K. Goel, et al. · Proceedings/Proceedings - International Test Conference · 224
Using a single input to support multiple scan chains
1998 · Kuen-Jong Lee, Jih-Jeen Chen, et al. · 194
Effective and efficient test architecture design for SOCs
2003 · S.K. Goel, E.J. Marinissen · Proceedings/Proceedings - International Test Conference · 183
A new procedure for weighted random built-in self-test
2002 · F. Muradali, V.K. Agarwal, et al. · Proceedings/Proceedings - International Test Conference · 161
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On broad-side delay test
2002 · J. Savir, S. Patil · 153
Nine-coded compression technique for testing embedded cores in SoCs
2005 · M. Tehranipoor, M. Nourani, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 136
Secured Flipped Scan-Chain Model for Crypto-Architecture
2007 · Gaurav Sengar, Debdeep Mukhopadhyay, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 133
Diagnosis of scan path failures
2002 · S. Edirisooriya, G. Edirisooriya · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 110
SOC test architecture design for efficient utilization of test bandwidth
2003 · Sandeep Kumar Goel, Erik Jan Marinissen · ACM Transactions on Design Automation of Electronic Systems · 104
Test data compression using dictionaries with selective entries and fixed-length indices
2003 · Lei Li, Krishnendu Chakrabarty, et al. · ACM Transactions on Design Automation of Electronic Systems · 103
LFSR-Reseeding Scheme Achieving Low-Power Dissipation During Test
2007 · Jinkyu Lee, Nur A. Touba · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 102
SMART And FAST: Test Generation for VLSI Scan-Design Circuits
1986 · M. Abramovici, J.J. Kulikowski, et al. · IEEE Design & Test of Computers · 99
Skewed-Load Transition Test: Part II, Coverage
2005 · S. Patil, J. Savir · Proceedings/Proceedings - International Test Conference · 94
Virtual scan chains: a means for reducing scan length in cores
2002 · A. Jas, B. Pouya, et al. · Proceedings - IEEE VLSI Test Symposium/Proceedings of the ... IEEE VLSI Test Symposium · 94
The Best Flip-Flops to Scan
2005 · M. Abramovici, J.J. Kulikowski, et al. · Proceedings/Proceedings - International Test Conference · 91
Diagnosis of scan chain failures
2002 · Yuejian Wu · Proceedings · 91
Silicon debug: scan chains alone are not enough
2003 · G.J. Van Rootselaar, B. Vermeulen · Proceedings/Proceedings - International Test Conference · 85
Design of compactors for signature-analyzers in built-in self-test
2002 · P. Wohl, J.A. Waicukauski, et al. · Proceedings/Proceedings - International Test Conference · 85
Automated synthesis of phase shifters for built-in self-test applications
2000 · J. Rajski, N. Tamarapalli, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 85
Works count: 1,514
Citation count: 14,550
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