Work

Clocked-neuron-MOS logic circuits employing auto-threshold-adjustment

Year: 2002

Type: conference-paper

Source: Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference

DOI: 10.1109/isscc.1995.535583

Authors: K. Kotani, T. Shibata, M. Imai, T. Ohmi

Institution: Tohoku University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W1566416706

FWCI: 9.386

Cites: 4

Cited by: 97

Related to: 10