Data memory minimisation for synchronous data flow graphs emulated on DSP-FPGA targets
Year: 1997
Type: conference-paper
Authors: Marleen Adé, Rudy Lauwereins, J. A. Peperstraete
Institution: KU Leuven
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2000625751
