Work

High performance Cu/low-k interconnect strategy beyond 10nm logic technology

Year: 2015

Type: conference-paper

Source: IEEE International Interconnect Technology Conference and IEEE Materials for Advanced Metallization Conference (IITC/MAM)

DOI: 10.1109/iitc-mam.2015.7325599

Authors: R.-H. Kim, B. H. Kim, J. N. Kim, J. J. Lee, J. M. Baek, J. H. Hwang, J. Hwang, J. Chang, S. Y. Yoo, T.-J. Yim, K.-M. Chung, K. H. Park, T. Oszinda, I S. Kim, E. B. Lee, S. D. Nam, S. Jung, Y. W. Cho, H. J. Choi, J. S. Kim, S. H. Ahn, S. H. Park, B. U. Yoon, J.-H. Ku, S. S. Paak, N.-I. Lee, S. Choi, H.-K. Kang, E. S. Jung

Institution: Samsung Electronics (South Korea)

Language: English

Topic: Copper Interconnects and Reliability

Subfield: Electronic, Optical and Magnetic Materials

Field: Materials Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W2011305422

FWCI: 1.4

Cites: 4

Cited by: 2

Related to: 10