Work

A subpicosecond jitter PLL for clock generation in 0.12-μm digital CMOS

Year: 2003

Type: article

Source: IEEE Journal of Solid-State Circuits

DOI: 10.1109/jssc.2003.813287

Authors: N. Da Dalt, C. Sandner

Institution: Infineon Technologies (Austria)

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2064167166

FWCI: 3.591

Cites: 6

Cited by: 39

Related to: 10