Utilizing Sub-5 nm sidewall electrode technology for atomic-scale resistive memory fabrication
Year: 2014
Type: conference-paper
Source: Symposium on VLSI Technology
Authors: Kai-Shin Li, ChiaHua Ho, Ming-Taou Lee, Min-Cheng Chen, Cho-Lun Hsu, J. M. Lu, C. H. Lin, C. C. Chen, B. W. Wu, Y. F. Hou, C. Yi. Lin, Y. J. Chen, T. Y. Lai, M. Y. Li, I. Yang, C. S. Wu, Fu-Liang Yang
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2073449168