Work

A graphical system for hierarchical specifications and checkups of VLSI circuits

Year: 1990

Type: conference-paper

Source: European Design Automation Conference

DOI: 10.5555/949970.950009

Authors: Bernd Becker, T. Burch, G. Hotz, D. Kiel, R. Kolla, Paul Molitor, Hans Georg Osthof, Gisela Pitsch, U. Sparmann

Institution: Saarland University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2099972750

FWCI: 3.55

Cites: 17

Cited by: 8

Related to: 10