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A 28 GHz Hybrid PLL in 32 nm SOI CMOS
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Year:
2014
Type:
article
Source:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/jssc.2014.2299273
Authors:
Mark Ferriss,
Alexander Rylyakov,
Jose A. Tierno,
Herschel Ainspan,
Daniel J. Friedman
Institutions:
IBM (United States),
IBM Research - Thomas J. Watson Research Center
Language:
English
Topic:
Advancements in PLL and VCO Technologies
Subfield:
Electrical and Electronic Engineering
Field:
Engineering
Domain:
Physical Sciences
Open Access status:
closed
OpenAlex ID:
W2104643154
FWCI:
3.542
Cites:
12
Cited by:
52
Related to:
10