A 286 mm/sup 2/ 256 Mb DRAM with X32 both-ends DQ
Year: 2002
Type: conference-paper
Source: Symposium on VLSI Circuits
Authors: Y. Watanabe, H. Wong, T. Kirihata, D. Kato, J. DeBrosse, T. Hara, M. Yoshida, H. Mukai, K. Quader, T. Nagai, P. Poechmueller, K. Pfefferl, M. Wordeman, S. Fujii
Institutions: IBM (United States), Toshiba (United States)
Language: French
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2106019019
