Asymmetric Energy Distribution of Interface Traps in n- and p-MOSFETs With $hbox HfO _2$ Gate Dielectric on Ultrathin SiON Buffer Layer
Year: 2004
Type: article
Source: IEEE Electron Device Letters
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2120201770
