Work

High-reliability and high-speed design of 1Mb CMOS SRAM with 0.5/spl mu/m devices

Year: 1989

Type: conference-paper

Source: Symposium on VLSI Circuits

DOI: 10.1109/vlsic.1989.1037474

Authors: Hayakawa, Kakumu, Aono, Yoshida, Sato, Noguchu, Ohtani, Nakayama, Asami, Morita, Kinugawa, Matsunaga, Ochit

Institution: Toshiba (Japan)

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2137454400

FWCI: 1.438

Cites:

Cited by: 1

Related to: 10