Work

A new statistical optimization algorithm for gate sizing

Year: 2004

Type: conference-paper

Source: IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD)

DOI: 10.1109/iccd.2004.1347933

Authors: M. Mani, M. Orshansky

Institution: The University of Texas at Austin

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: University of Texas at Austin

OpenAlex ID: W2165973136

FWCI: 11.21

Cites: 22

Cited by: 69

Related to: 10