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DRAM Refresh Mechanisms, Penalties, and Trade-Offs

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Year: 2015
Type: article
Source: IEEE Transactions on Computers
DOI: 10.1109/tc.2015.2417540
Authors: Ishwar Bhati, Mu-Tien Chang, Zeshan Chishti, Shih-Lien Lu, Bruce Jacob
Institutions: Samsung Semiconductor (United States), Intel (United States), University of Maryland, College Park
Language: English

Topic: Parallel Computing and Optimization Techniques
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences

Open Access status: closed

Funders: U.S. Department of Defense, U.S. Department of Energy, Sandia National Laboratories
OpenAlex ID: W2193198328
FWCI: 27.39
Cites: 39
Cited by: 165
Related to: 10
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