Work

A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture

Year: 2007

Type: article

Source: IEEE Journal of Solid-State Circuits

DOI: 10.1109/jssc.2007.903099

Authors: H. Yamasaki, T. Shibata

Institution: The University of Tokyo

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2567052870

FWCI: 5.194

Cites: 22

Cited by: 58

Related to: 10