Work

A High-Performance, Low-Temperature Self-Aligned Gate E/D Process

Year: 1986

Type: conference-paper

Source: Technical digest -- IEEE Compound Semiconductor Integrated Circuit Symposium

DOI: 10.1109/gaas.1986.10400000

Authors: S. P. Kwok, Y. Chang, D. M. Bullock, M. Feng, V. K. Eu, T. R. Lepkowski, Z. J. Lemnios, G. E. Noufer, C. J. Dicke, R. T. Schoendube, H. B. Kim

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2760122693

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