An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques
Year: 2020
Type: article
Authors: Chang-Kyo Lee, Hyung-Joon Chi, Jin-Seok Heo, Jung-Hwan Park, Jin-Hun Jang, Dongkeon Lee, Jae-Hoon Jung, Dong-Hun Lee, Dae-Hyun Kim, Kihan Kim, Sang-Yun Kim, Dukha Park, Youngil Lim, Geuntae Park, Seung-Jun Lee, Seungki Hong, Dae-Hyun Kwon, Isak Hwang, Byongwook Na, Kyung-Ryun Kim, Seouk-Kyu Choi, Hyein Choi, Hangi-Jung, Won-Il Bae, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee
Institutions: Samsung (South Korea), Samsung Electronics (South Korea)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W3083765802