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Ongoing Evolution of DRAM Scaling via Third Dimension -Vertically Stacked DRAM -

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Year: 2023
Type: conference-paper
Source: IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
DOI: 10.23919/vlsitechnologyandcir57934.2023.10185290
Authors: J.W. Han, S.H. Park, M.Y. Jeong, K.S. Lee, K.N. Kim, H.J. Kim, J.C. Shin, S.M. Park, S.H. Shin, S.W. Park, K.S. Lee, J.H. Lee, S.H. Kim, B.C Kim, M.H. Jung, I.Y. Yoon, H. Kim, S.U. Jang, K.J. Park, Y.K. Kim, I.G. Kim, J.H Oh, S.Y. Han, B.S. Kim, B.J. Kuh, J.M. Park
Institutions: Samsung (South Korea), Samsung Electronics (South Korea)
Language: English

Topic: 3D IC and TSV technologies
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences

Open Access status: closed
OpenAlex ID: W4385192512
FWCI: 43.38
Cites: 1
Cited by: 96
Related to: 10
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