Work

Design and FPGA implementation of reversible vedic multipliy and accumulate unit for cryptography applications

Year: 2026

Type: article

Source: Analog Integrated Circuits and Signal Processing

DOI: 10.1007/s10470-026-02653-8

Authors: V. Thamizharasan, A. Nikhil, M. Vigneshwara, B. Mahesh Bala, S. Vasantha Kumar

Institution: Sengunthar Engineering College (Autonomous)

Language: English

Topic: Quantum-Dot Cellular Automata

Subfield: Computational Theory and Mathematics

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W7208729148

FWCI:

Cites: 18

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Related to: 10