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Sukeshwar Kannan

Observed names: S. Kannan, Sukesh Kannan
ORCID: 0000-0003-4107-2126
Observed ORCID: 0000-0003-4107-2126
OpenAlex ID: A5016961561
Impact of Electrostatic Coupling and Wafer-Bonding Defects on Delay Testing of Monolithic 3D Integrated Circuits
2017 · Abhishek Koneru, Sukeshwar Kannan, et al. · ACM Journal on Emerging Technologies in Computing Systems · 45
Development of novel carbon nanotube TSV technology
2010 · Anurag Gupta, Sukeshwar Kannan, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 29
Analysis of carbon nanotube based Through Silicon Vias
2010 · Sukeshwar Kannan, Anurag Gupta, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 29
A Design-for-Test Solution Based on Dedicated Test Layers and Test Scheduling for Monolithic 3-D Integrated Circuits
2018 · Abhishek Koneru, Sukeshwar Kannan, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 27
High Density Integration of Silicon Photonic Chiplets for 51.2T Co-packaged Optics
2024 · Sukeshwar Kannan, Ray Chang, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 26
SoC Speed Binning Using Machine Learning and On-Chip Slack Sensors
2016 · Mehdi Sadi, Sukeshwar Kannan, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 26
Fault Modeling and Multi-Tone Dither Scheme for Testing 3D TSV Defects
2011 · Sukeshwar Kannan, Bruce Kim, et al. · Journal of Electronic Testing · 24
Impact of wafer-bonding defects on Monolithic 3D integrated circuits
2016 · Abhishek Koneru, Sukeshwar Kannan, et al. · IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) · 23
Analysis of CNT based 3D TSV for emerging RF applications
2011 · Anurag Gupta, Bruce C. Kim, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 21
High Density Integration Technologies for SiPh Based Optical I/Os
2023 · Karl Muth, Vivek Raghuraman, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 18
Development of Carbon Nanotube Based Through-Silicon Vias
2010 · Bruce C. Kim, Sukeshwar Kannan, et al. · Journal of Nanotechnology in Engineering and Medicine · 18
Accelerating artificial intelligence with silicon photonics
2020 · Nicholas C. Harris, Ryan Braid, et al. · Optical Fiber Communication Conference · 16
Device performance analysis on 20nm technology thin wafers in a 3D package
2015 · Sukeshwar Kannan, Rahul Agarwal, et al. · IEEE International Reliability Physics Symposium proceedings · 16
3D Packaging Challenges for High-End Applications
2017 · Rahul Agarwal, Sukeshwar Kannan, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 15
TSV electrical and mechanical modeling for thermo-mechanical delamination
2013 · Kaushal Kannan, Sukeshwar Kannan, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 14
3-D Copper based TSV for 60-GHz applications
2011 · Sukeshwar Kannan, Sai Shravan Evana, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 14
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs
2021 · Arjun Chaudhuri, Sanmitra Banerjee, et al. · ACM Journal on Emerging Technologies in Computing Systems · 13
Pre-Bond Testing of the Silicon Interposer in 2.5D ICs
2016 · Ran Wang, Zipeng Li, et al. · Design, Automation, and Test in Europe · 13
Prebond Testing and Test-Path Design for the Silicon Interposer in 2.5-D ICs
2016 · Ran Wang, Zipeng Li, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 10
Characterization of high performance CNT-based TSV for high-frequency RF applications
2012 · Sukeshwar Kannan, Bruce Kim, et al. · Advances in materials Research · 10
Design of a digital IP for 3D-IC die-to-die clock synchronization
2017 · Mehdi Sadi, Sukeshwar Kannan, et al. · IEEE International Symposium on Circuits and Systems proceedings · 9
Chip package interaction analysis for 20-nm technology with thermo-compression bonding with non-conductive paste
2015 · Jae Kyu Cho, Shan Gao, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 9
Chip Packaging Interaction (CPI) with Cu Pillar Flip Chip for 20 nm Silicon Technology and Beyond
2014 · Shan Gao, Ryan Scott Smith, et al. · ECS Journal of Solid State Science and Technology · 9
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Challenges to via middle TSV integration at sub-28nm nodes
2014 · Himani Suhag Kamineni, Sukeshwar Kannan, et al. · IEEE International Interconnect Technology Conference (IITC) · 9
A Design-for-Test Solution for Monolithic 3D Integrated Circuits
2017 · Abhishek Koneru, Sukeshwar Kannan, et al. · IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD) · 8
Works count: 55
Citation count: 535
H-index: 14
I10-index: 20
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