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Po-Wei Chiu

Observed names: P. Chiu, Po-wei Chiu
ORCID: 0000-0002-4211-1564
Observed ORCID: 0000-0002-4211-1564
OpenAlex ID: A5073879008
A 1,968-node coupled ring oscillator circuit for combinatorial optimization problem solving
2022 · William Moy, Ibrahim Ahmed, et al. · Nature Electronics · 158
A Probabilistic Compute Fabric Based on Coupled Ring Oscillators for Solving Combinatorial Optimization Problems
2021 · Ibrahim Ahmed, Po-Wei Chiu, et al. · IEEE Journal of Solid-State Circuits · 141
A Probabilistic Self-Annealing Compute Fabric Based on 560 Hexagonally Coupled Ring Oscillators for Solving Combinatorial Optimization Problems
2020 · Ibrahim Ahmed, Po-Wei Chiu, et al. · Symposium on VLSI Circuits · 49
Analysis and Design of Crosstalk Noise Reduction for Coupled Striplines Inserted Guard Trace With an Open-Stub on Time-Domain in High-Speed Digital Circuits
2011 · Guang-Hwa Shiue, Jia-Hung Shiu, et al. · IEEE Transactions on Components Packaging and Manufacturing Technology · 31
A 65-nm 10-Gb/s 10-mm On-Chip Serial Link Featuring a Digital-Intensive Time-Based Decision Feedback Equalizer
2017 · Po-Wei Chiu, Somnath Kundu, et al. · IEEE Journal of Solid-State Circuits · 22
22.4 A 32Gb/s Digital-Intensive Single-Ended PAM-4 Transceiver for High-Speed Memory Interfaces Featuring a 2-Tap Time-Based Decision Feedback Equalizer and an In-Situ Channel-Loss Monitor
2020 · Po-Wei Chiu, Chris Kim · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 18
A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors
2022 · Po-Wei Chiu, Chris H. Kim · IEEE Transactions on Circuits and Systems I Regular Papers · 12
A 40-Gb/s 4-Vpp Differential Modulator Driver in 90-nm CMOS
2017 · Yan-Feng Li, Po-Wei Chiu, et al. · IEEE Microwave and Wireless Components Letters · 11
Improvements of Time-Domain Transmission Waveform and Eye Diagram of Serpentine Delay Line Using Open-Stub Type Guard Traces in Embedded Microstrip Line
2011 · Guang-Hwa Shiue, Jia-Hung Shiu, et al. · IEEE Transactions on Components Packaging and Manufacturing Technology · 10
The impact of guard trace with open stub on time-domain waveform in high-speed digital circuits
2009 · Po-Wei Chiu, Guang-Hwa Shiue · IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) · 6
A 10Gb/s 10mm on-chip serial link in 65nm CMOS featuring a half-rate time-based decision feedback equalizer
2017 · Po-Wei Chiu, Somnath Kundu, et al. · Symposium on VLSI Circuits · 5
A Counter based ADC Non-linearity Measurement Circuit and Its Application to Reliability Testing
2019 · Gyusung Park, Minsu Kim, et al. · Custom Integrated Circuits Conference · 4
New wideband common-mode noise filter using quarter-wavelength resonator for high-speed differential signals
2010 · Guang-Hwa Shiue, Che-Ming Hsu, et al. · IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) · 4
A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer
2018 · Po-Wei Chiu, Muqing Liu, et al. · IEEE Asian Solid-State Circuits Conference (A-SSCC) · 3
Physical-Based Verification of High-Speed Channel Crosstalk and Correlation with BER Measurements
2024 · Guan-Yu Lin, Po-Chen Lin, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 2
Improvements of time-domain transmission waveform and eye diagram of serpentine delay line using guard trace stubs in stripline structure
2010 · Guang-Hwa Shiue, Jia-Hung Shiu, et al. · IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) · 2
Highly efficient and accurate package electrical modeling automation
2016 · Po-Wei Chiu, Chun-Hung Lin, et al. · IEEE Electronics Packaging Technology Conference (EPTC) · 1
High speed and low power silicon-based receiver front-end for optical interconnect
2016 · Shen-Wen Chen, Po-Wei Chiu, et al. · IEEE International Conference on Group IV Photonics (GFP) · 1
Leveraging Circuit Reliability Effects for Designing Robust and Secure Physical Unclonable Functions
2019 · M. Kim, G. Park, et al. · Technical digest - International Electron Devices Meeting/Technical digest
Fast Physical Verification for 16nm Package Electrical Performance
2019 · Hong Shi, Chao-Chin Lee, et al. · IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)
Integration of High Speed and Low Power CMOS Front-end Circuits with Silicon Photonic Devices
2016 · S. Hsu, Y. Li, et al. · International Conference on Solid State Devices and Materials (SSDM)
高度に効率的で正確なパッケージの電気的モデリングの自動化【Powered by NICT】
2016 · Po-Wei Chiu, Lin Chun-Hung, et al. · IEEE Conference Proceedings
Works count: 22
Citation count: 480
H-index: 9
I10-index: 9
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