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Vibhuti Chauhan
Institution:
Maulana Azad National Institute of Technology
Observed institutions:
Indian Institute of Information Technology Design and Manufacturing Jabalpur,
Maulana Azad National Institute of Technology
ORCID:
0000-0003-4954-1214
Observed ORCID:
0000-0003-4954-1214
OpenAlex ID:
A5083166847
Recent Advances in Negative Capacitance FinFETs for Low-Power Applications: A Review
2021
·
Vibhuti Chauhan
, Dip Prakash Samajdar
·
IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control
·
60
Sensitivity Analysis of a Novel Negative Capacitance FinFET for Label-Free Biosensing
2021
·
Ankit Dixit
, Dip Prakash Samajdar
, et al.
·
IEEE Transactions on Electron Devices
·
54
A Novel Negative Capacitance FinFET With Ferroelectric Spacer: Proposal and Investigation
2021
·
Vibhuti Chauhan
, Dip Prakash Samajdar
, et al.
·
IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control
·
32
Exploration and Device Optimization of Dielectric–Ferroelectric Sidewall Spacer in Negative Capacitance FinFET
2022
·
Vibhuti Chauhan
, Dip Prakash Samajdar
, et al.
·
IEEE Transactions on Electron Devices
·
21
Advanced CJ-NFe-FET architectures with ferroelectric gate stacks: Optimizing Electrostatics, linearity, and energy storage for next-generation nanoelectronics
2025
·
Abhay Pratap Singh
, Alok Kumar
, et al.
·
Micro and Nanostructures
·
8
Enhancing VLSI Design Efficiency With ML ‐Based C‐ ANN : Performance Optimization of Gate‐Stacked Ferroelectric FE ‐ MOSFETs for High‐Speed and RF Applications
2025
·
Abhay Pratap Singh
, Vibhuti Chauhan
, et al.
·
International Journal of Numerical Modelling Electronic Networks Devices and Fields
·
7
Estimation of performance degradation due to interface traps in the gate and spacer stack of NC-FinFET
2023
·
Vibhuti Chauhan
, Dip Prakash Samajdar
·
Semiconductor Science and Technology
·
7
Performance Comparison of III–V and Silicon FinFETs for Ultra-Low Power VLSI Applications
2021
·
Ankit Dixit
, Dip Prakash Samajdar
, et al.
·
Lecture notes in electrical engineering
·
7
Demonstration of Improved Short Channel Performance Metrics for Ferroelectric Concentric Negative Capacitance FinFET
2022
·
Vibhuti Chauhan
, Dip Prakash Samajdar
, et al.
·
Silicon
·
6
Buried interfacial gate oxide for tri-gate negative-capacitance fin field-effect transistors: approach and investigation
2023
·
Vibhuti Chauhan
, Dip Prakash Samajdar
·
Journal of Physics D Applied Physics
·
3
Impact of Buried Gate Oxide on the Electrical Performance of Negative Capacitance FinFETs: Design Perspectives
2024
·
Vibhuti Chauhan
, Dip Prakash Samajdar
·
Silicon
·
2
Quasi-analytical model of surface potential and drain current for trigate negative capacitance FinFET: a superposition approach
2022
·
Vibhuti Chauhan
, Dip Prakash Samajdar
, et al.
·
Semiconductor Science and Technology
·
2
Performance Evaluation of Buried Gate Oxide based Negative Capacitance FinFETs
2023
·
Vibhuti Chauhan
, Dip Prakash Samajdar
·
Devices for Integrated Circuit (DevIC)
·
1
Demonstration of High-Permittivity Sidewall Spacer in Negative Capacitance FinFET
2022
·
Vibhuti Chauhan
, Dip Prakash Samajdar
, et al.
·
Springer Proceedings in Materials
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Works count:
14
Citation count:
210
H-index:
7
I10-index:
4
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