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Kateryna Serbulova

Observed names: K. Serbulova, Serbulova, Kateryna
Institutions: IMEC, KU Leuven
ORCID: 0000-0001-7326-9949
Observed ORCID: 0000-0001-7326-9949
OpenAlex ID: A5084814607
Backside Power Delivery: Game Changer and Key Enabler of Advanced Logic Scaling and New STCO Opportunities
2023 · A. Veloso, B. Vermeersch, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 39
CMOS Scaling by Nanosheet Device Architectures and Backside Engineering
2024 · N. Horiguchi, H. Mertens, et al. · International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) · 12
Impact of Sub-µm Wafer Thinning on Latch-up Risk in STCO Scaling Era
2021 · Kateryna Serbulova, Shih-Hung Chen, et al. · Annual EOS/ESD Symposium (EOS/ESD) · 5
ESD Robustness of Germanium Photodetectors in Advanced Silicon Photonics Technology
2024 · Shih-Hung Chen, P.-Y. Fu, et al. · Annual EOS/ESD Symposium (EOS/ESD) · 3
PDF
Insight into Latchup Risk in 28nm Planar Bulk Technology for Quantum Computing Applications
2024 · Kateryna Serbulova, Zi-En Qiu, et al. · IEEE International Reliability Physics Symposium proceedings · 2
Impact of Sub-μm Wafer Thinning on Latch-Up Risk in DTCO/STCO Scaling Era
2024 · Kateryna Serbulova, Shih-Hung Chen, et al. · IEEE Transactions on Electron Devices · 2
Upcoming Challenges of ESD Reliability in DTCO with BS-PDN Routing via BPRs
2023 · W.-C. Chen, S.-H. Chen, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2
Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO
2022 · K. Serbulova, S.-H. Chen, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2
TCAD study of latch-up sensitivity to wafer thinning below 500 nm
2021 · Gaspard Hiblot, Kateryna Serbulova, et al. · CAS proceedings · 2
ESD Challenges in 300nm Si Substrate of DTCO/STCO Scaling Options
2023 · W.-C. Chen, S.-H. Chen, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 1
ESD Protection Diodes in Sub-5nm Gate-All-Around Nanosheet Technologies
2020 · Shih‐Hung Chen, A. Veloso, et al. · Lirias · 1
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Simulation of the Sample Overheat for the Four Point Semiconductor Resistivity Measurement
2019 · Kateryna Serbulova, Youry Vountesmery · IEEE International Conference on Electronics and Nanotechnology (ELNANO) · 1
(Invited) Advanced Compute Scaling: A New Era of Exciting, Sustainability-Aware Innovations with Nanosheet-Based Devices, Increased Interdisciplinary Synergies, and (R)Evolution Towards Higher Versatility
2024 · Anabela Veloso, Geert Eneman, et al. · ECS Meeting Abstracts
(Invited) Advanced Compute Scaling: A New Era of Exciting, Sustainability-Aware Innovations with Nanosheet-Based Devices, Increased Interdisciplinary Synergies, and (R)Evolution Towards Higher Versatility
2024 · Anabela Veloso, Geert Eneman, et al. · ECS Transactions
Impact of Backside Power Delivery Network with Buried Power Rails on Latch-up Immunity in DTCO/STCO
2023 · K. Serbulova, S.-H. Chen, et al. · Annual EOS/ESD Symposium (EOS/ESD)
Works count: 16
Citation count: 72
H-index: 3
I10-index: 2
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