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A. Keshavarzi

Parameter variations and impact on circuits and microarchitecture
2003 · Shekhar Borkar, Tanay Karnik, et al. · ACM/IEEE Design Automation Conference (DAC) · 1,394
The future of ferroelectric field-effect transistor technology
2020 · Asif Islam Khan, Ali Keshavarzi, et al. · Nature Electronics · 981
Thermal Challenges in Next-Generation Electronic Systems
2008 · Suresh V. Garimella, Amy S. Fleischer, et al. · IEEE Transactions on Components and Packaging Technologies · 520
Intrinsic leakage in low power deep submicron CMOS ICs
2002 · A. Keshavarzi, K. Roy, et al. · IEEE International Test Conference (ITC) · 203
Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs
2001 · A. Keshavarzi, S. Ma, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 188
Forward body bias for microprocessors in 130-nm technology generation and beyond
2003 · S. Narendra, A. Keshavarzi, et al. · IEEE Journal of Solid-State Circuits · 140
Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's
1999 · A. Keshavarzi, S. Narendra, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 114
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High performance 22/20nm FinFET CMOS devices with advanced high-K/metal gate scheme
2010 · C.C. Wu, D.W. Lin, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 112
FerroElectronics for Edge Intelligence
2020 · Ali Keshavarzi, Kai Ni, et al. · IEEE Micro · 102
Assessment of MOCVD- and MBE-growth GaAs for high-efficiency solar cell applications
1990 · S.P. Tobin, S.M. Vernon, et al. · IEEE Transactions on Electron Devices · 99
2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology
2009 · Dinesh Somasekhar, Yibin Ye, et al. · IEEE Journal of Solid-State Circuits · 94
Parameter variations and impact on circuits and microarchitecture
2004 · S. Borkar, T. Karnik, et al. · ACM/IEEE Design Automation Conference (DAC) · 86
Ultra-low voltage circuits and processor in 180nm to 90nm technologies with a swapped-body biasing technique
2004 · S. Narendra, J. Tschanz, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 85
Edge Intelligence—On the Challenging Road to a Trillion Smart Connected IoT Devices
2019 · Ali Keshavarzi, Wilbert van den Hoek · IEEE Design and Test · 69
Carbon Nanotube Field-Effect Transistors for High-Performance Digital Circuits—DC Analysis and Modeling Toward Optimum Transistor Structure
2006 · A. Raychowdhury, A. Keshavarzi, et al. · IEEE Transactions on Electron Devices · 67
A self-consistent junction temperature estimation methodology for nanometer scale ICs with implications for performance and thermal management
2004 · K. Banerjee, Sheng-Chih Lin, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 65
1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS
2003 · S. Narendra, M. Haycock, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 65
Parametric failures in CMOS ICs - a defect-based analysis
2003 · J. Segura, A. Keshavarzi, et al. · IEEE International Test Conference (ITC) · 64
Dual-V/sub T/ SRAM cells with full-swing single-ended bit line sensing for high-performance on-chip cache in 0.13 μm technology generation
2000 · F. Hamzaoglu, Y. Ye, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 63
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Multiple-parameter CMOS IC testing with increased sensitivity for I/sub DDQ/
2002 · A. Keshavarzi, K. Roy, et al. · IEEE International Test Conference (ITC) · 60
Carbon Nanotube Field-Effect Transistors for High-Performance Digital Circuits—Transient Analysis, Parasitics, and Scalability
2006 · A. Keshavarzi, A. Raychowdhury, et al. · IEEE Transactions on Electron Devices · 51
Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage
2005 · Ali Keshavarzi, Steven Duvall, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 50
Parameter variations and impact on circuits and microarchitecture
2003 · Shekhar Borkar, Tanay Karnik, et al. · ACM/IEEE Design Automation Conference (DAC) · 50
Variation Tolerance in a Multichannel Carbon-Nanotube Transistor for High-Speed Digital Circuits
2009 · Arijit Raychowdhury, Vivek K. De, et al. · IEEE Transactions on Electron Devices · 49
Analysis of dual-V/sub T/ SRAM cells with full-swing single-ended bit line sensing for on-chip cache
2002 · F. Hamzaoglu, Y. Ye, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 46
Works count: 109
Citation count: 5,609
H-index: 33
I10-index: 53
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